The present invention relates to memory arrays, and more particularly to a semiconductor device having reduced field oxide recess and method of fabrication.
Achieving higher densities on a memory chip and using less processing steps is a common goal during chip fabrication. The various processes and techniques used to manufacture chips have therefore become increasingly important. Part of the process involved in manufacturing a flash memory array, for example, requires generating select gate transistors and word-line transistors on a silicon substrate with different gate oxide thickness, as shown in FIGS. 1A and 1B.
FIG. 1A is a top view of a portion of a flash memory array 10 showing a select gate region 12 of the chip where select gates 14 are located and a word-line region 16 where word-line gates 18 are located. FIG. 1B is a cross-sectional view of the memory array 10. Both the select gate 14 and word-line gate 18 are grown over a gate oxide layer, but the gate oxide 20 in the select gate region 12 is thicker than the gate oxide 22 in the word-line region 16.
The first step for fabricating the array 10 is creating columns of active regions and insulating field oxide regions (FOX) using a LOCOS (LOCal Oxidation of Silicon) process. After LOCOS, the next major step is the oxidation process, which typically includes performing a select gate oxidation process for the select gate region 12 and performing a tunnel gate oxidation process for the word line region 16.
FIG. 2 is a flow chart illustrating a conventional oxidation process. To obtain a high quality gate oxide, the first step of the process is to perform a xe2x80x9csacrificialxe2x80x9d oxidation in step 30 whereby a sacrificial layer of oxide is grown on exposed active regions to remove any unwanted material from the substrate to obtain sufficient integrity of the tunnel gate oxide 22 and the select gate oxide 20. Integrity of the tunnel gate oxide 22 is required because during program and erase of flash memories, approximately 20 v is applied to the word line region 16. This is in contrast to the select gate region 12 in which only approximately 5 v is applied.
Thereafter, a core implant process and field implant process are performed in steps 32 and 34. After the implants, an HF dip is performed for approximately 10 minutes to remove approximately 300 Angstroms of material in step 36. The reason for the sacrificial oxidization in step 30 is to prevent a recess in the field oxide caused by the HF dip, as shown in FIG. 3.
FIG. 3 is a cross-sectional view of the substrate 10 showing that if the sacrificial oxidization process were not performed, the HF dip process would create a field oxide recess 46 between the edges of the FOX regions 48 and the substrate 10.
Referring again to FIG. 2, after the HF dip, select gate oxidation is performed in step 38 in which a layer of select gate oxide is grown over both regions of the substrate to a depth of approximately 150 angstroms, followed by a deposition of a tunnel oxide mask in step 40.
Thereafter, a wet-etch process is performed to remove the select gate oxide 20 in the word-line region 16 that is not covered by the tunnel oxide mask in step 42. After the gate oxide 20 is removed from the word-line region 16, the tunnel oxide mask is removed. This is followed by tunnel oxidation where a layer of gate oxide is grown over both regions in step 44.
Referring again to FIG. 1B, this process will result in a select gate oxide 20 having a thickness of approximately 180 angstroms, and a tunnel oxide 22 having a thickness of approximately 90 angstroms. Although the conventional oxidation process effectively provides the select gate oxide 20 and tunnel gate oxide 22, it requires extra steps to prevent the field oxide recess 46.
Accordingly, a more efficient oxidation process for providing the select gate oxide 20 and tunnel gate oxide 22 that reduces field oxide recess is needed. The present invention addresses such a need.
The present invention provides a semiconductor device having reduced field oxide recess and method of fabrication. The method for fabricating the semiconductor device begins by performing an HF dip process on a substrate after field oxidation, followed by performing a select gate oxidation. Thereafter, a core implant and a field implant are performed. After the implants, a tunnel oxide mask is deposited. The select gate oxide is then etched in areas uncovered by the tunnel oxide mask, and tunnel oxidation is performed.
According to the system and method disclosed herein, a sacrificial oxidation step is skipped in the select gate region and replaced by the select gate oxidation. This reduces the number of process steps necessary for select gate formation, while reducing the field oxide recess, and maintaining sufficient integrity of the tunnel gate oxide.